Circuits which are capable of transmitting and receiving serial digital data wherein both modes of communication do not occur simultaneously are commonly used in microprocessor based systems. Others have used data registers to store transmit and receive data used for communication via a data bus internal to the processor based system. Two separate sets of data registers are commonly used for storing the data in a transmit and a receive portion, respectively. Two sets of shift registers are each commonly coupled to a respective set of data registers for serially receiving data from a source external to the system or for transmitting data to an external source. Disadvantages associated with using two distinct sets of data registers for transmit and receive functions include the amount of circuitry required and the associated interconnect routing. Additionally, justification of data in the shift registers must be correct to avoid data errors and may require additional circuitry.